# Circuit Diagram Of Half Subtractor

**Half subtractor truth table.**

**Circuit diagram of half subtractor**.
Construction of half subtractor circuit in the block diagram we have seen that it contains two inputs and two outputs.
The carry and sum are the output states of the half subtractor.
But when performing multi digit operations the subtraction is to be performed with the borrow from the previous digit.

The logic circuit diagram for a half subtractor circuit is draw from the boolean expression. The half subtractor is designed with the help of the following logic gates. The circuit diagram for the half subtractors and the truth table is.

Half subtractor is a combinational logic circuit used for the purpose of subtracting two single bit numbers. Half subtractor is limited to subtraction of two bits without borrow. Demerit of half subtractor.

Half subtractor definition block diagram truth table circuit diagram logic diagram boolean expression and equation are discussed. It produces two output bits d and b out. So the block diagram of a half subtractor which requires only two inputs and provide two outputs.

This is the official method for finding the boolean algebra equation for any circuit. For making nand gate we have used and gate and not gate. We can make this circuit using ex or and nand gate.

Half subtractor is a combination circuit with two inputs and two outputs difference and borrow. In this physics digital electronics video in hindi for b sc. B in is the borrow in bit from the previous stage.